The present invention relates generally to integrated circuit memory devices, and in particular to the metal doping of chalcogenide materials in the fabrication of chalcogenide memory elements and integrated circuit devices containing such memory elements.
Electrically programmable and erasable materials, i.e., materials that can be electrically switched between a generally resistive state and a generally conductive state are well known in the art. Chalcogenide materials are one class of examples of such materials finding use in the semiconductor industry, particularly in the fabrication of non-volatile memory devices.
Chalcogenide materials are compounds made of one or more chalcogens and one or more elements that are more electropositive than the chalcogens. Chalcogens are the Group VIB elements of the traditional IUPAC version of the periodic table, i.e., oxygen (O), sulfur (S), selenium (Se), tellurium (Te) and polonium (Po). The more electropositive elements are generally selected from Groups IVB and VB. Typical combinations for non-volatile memory devices include selenium and/or tellurium with germanium (Ge) and/or antimony (Sb). However, other combinations are also known, such as combinations of arsenic (As) and sulfur.
To obtain the desired electrical characteristics, chalcogenide materials are often doped with metal, such as copper (Cu), silver (Ag), gold (Au) or aluminum (Al). FIGS. 1A-1D depict the fabrication of a simple chalcogenide memory element 100. The basic structure of a chalcogenide memory element includes a first electrode, a second electrode and a chalcogenide material interposed between the first and second electrodes. Additional detail of chalcogenide memory devices, as well as examples of variations on the basic structure of a chalcogenide memory element, are given in U.S. Pat. No. 5,998,244 issued Dec. 7, 1999 to Wolstenholme et al., U.S. Pat. No. 5,920,788 issued Jul. 6, 1999 to Reinberg, and U.S. Pat. No. 5,837,564 issued Nov. 17, 1998 to Sandhu et al., each of which is commonly assigned with the assignee of the present disclosure. In general, chalcogenide memory elements are formed on a semiconductor wafer or other substrate as a portion of an integrated circuit device.
Chalcogenide memory elements typically store a single bit, e.g., a low resistivity (high conductivity) corresponding to a first logic state and a high resistivity (low conductivity) corresponding to a second logic state. Differing levels of resistivity of the chalcogenide memory elements are sensed using current sensing techniques well known in the art while applying a read potential of less than the threshold potential.
Chalcogenide memory elements can be electrically switched between conductivity states by applying varying electrical fields to the doped chalcogenide material. By applying a programming potential above some threshold potential, the metal dopant atoms are believed to align in a dendritic structure, thereby forming conductive channels and decreasing the resistivity of the chalcogenide material. This transition is reversible by applying a potential having an opposite polarity. A range of applied potentials having a magnitude of less than the threshold potential, i.e., read potentials, can be applied without altering the resistivity of the doped chalcogenide materials. These read potentials can be applied to the chalcogenide memory elements for sensing the resistivity of the doped chalcogenide material and, thus, the memory elements"" data values.
Unlike dynamic random access memory (DRAM) devices, a non-volatile memory device does not require a periodic refresh to maintain its programmed state. Instead, non-volatile memory devices can be disconnected from a power source for extended periods of time, often measured in years, without the loss of the information stored in its memory cells. Chalcogenide materials best suited for use in non-volatile memory devices will thus tend to maintain their degree of resistivity indefinitely if an applied voltage does not exceed the threshold potential.
In FIG. 1A, a first electrode 110 is formed and a chalcogenide layer 115 is formed overlying the first electrode 110. As noted previously, electrical characteristics of chalcogenide layer 115 may be improved through doping of the chalcogenide material with metal. This is typically carried out through a process known as photo-doping where diffusion of metal atoms is photon induced. In this process, a metal layer 120 is first formed on the chalcogenide layer 115 as shown in FIG. 1A. The metal layer 120 typically contains the copper, silver, gold, aluminum or other high-diffusing metal. Formation of the first electrode 110 and/or the metal layer 120 is typically performed in a vacuum chamber, e.g., using a vacuum sputtering process.
To continue the photo-doping process in FIG. 1B, electromagnetic radiation 125 is directed at the metal layer 120, resulting in diffusion of metal atoms from the metal layer 120 into the chalcogenide layer 115. The electromagnetic radiation 125 is generally ultraviolet (UV) light. Driving metal atoms into the chalcogenide layer 115 results in a doped chalcogenide layer 130 containing the chalcogenide material and the diffused metal. The semiconductor wafer must generally be removed from the vacuum chamber to expose the wafer surface to the UV light source.
The photo-doping process is generally carried out until the metal layer 120 is completely diffused into the doped chalcogenide layer 130 as shown in FIG. 1C. The thickness of the metal layer 120 should be chosen such that the desired doping level can be attained in the doped chalcogenide layer 130. However, the metal layer 120 must be thin enough, e.g., hundreds of angstroms, to allow transmission of the electromagnetic radiation 125 in order to produce the desired photon-induced diffusion of metal. As shown in FIG. 1D, a second electrode 150 is then formed overlying the doped chalcogenide layer 130 and any remaining portion of the metal layer 120 to produce chalcogenide memory element 100. As with the first electrode 110 and/or the chalcogenide layer 115, formation of the second electrode 150 is also typically performed in a vacuum chamber. The second electrode 150 is preferably a material having a different work function ("PHgr"m) than the first electrode 110. The work function is a measure of the energy required to remove an electron from a material""s surface.
There are several disadvantages to the traditional photo-doping process. The process can be time consuming as the semiconductor wafers are moved in and out of a vacuum chamber during the various processing stages described above. This movement of the semiconductor wafers among various process equipment also increases the chance of contamination or other damage during transport. Also, because the metal layer must be thin for efficient photon-induced diffusion of metal, the desired doping level may not be efficiently attainable with a single photo-doping process as the necessary thickness of the metal layer may result in excessive reflection of the electromagnetic radiation.
For the reasons stated above, and for other reasons stated below that will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative methods for producing chalcogenide memory elements.
Methods are described herein for forming metal-doped chalcogenide layers and devices containing such doped chalcogenide layers. The methods include using a plasma to induce diffusion of metal into a chalcogenide layer concurrently with metal deposition. The plasma contains at least one noble gas of low atomic weight, such as neon or helium. The plasma has a sputter yield sufficient to sputter a metal target and a UV component of its emitted spectrum sufficient to induce diffusion of the sputtered metal into the chalcogenide layer. Using such methods, a conductive layer can be formed on the doped chalcogenide layer in situ. In integrated circuit devices, such as non-volatile chalcogenide memory devices, doping of a chalcogenide layer concurrently with metal deposition and formation of a conductive layer in situ with the doping of the chalcogenide layer reduces contamination concerns and physical damage resulting from moving the device substrate from tool to tool, thus facilitating improved device reliability.
For another embodiment, the invention provides a method of forming a doped chalcogenide layer. The method includes sputtering metal using a plasma containing at least one component gas selected from the group consisting of neon and helium and driving the sputtered metal into a layer of chalcogenide material using the UV component generated by the plasma.
For a further embodiment, the invention provides a method of forming a doped chalcogenide layer. The method includes forming a layer of chalcogenide material and sputtering metal onto the layer of chalcogenide material using a plasma containing at least two noble gases. The plasma emits a spectrum having a UV component capable of driving the sputtered metal into the layer of chalcogenide material through UV-enhanced diffusion. For one embodiment, the composition of the plasma is chosen to have an average atomic weight sufficient to produce a desired sputtering efficiency. For another embodiment, the composition of the plasma is chosen to have a desired relative intensity of a UV component of the emitted spectrum of the plasma. For yet another embodiment, the composition of the plasma is chosen to have a desired emitted spectrum of the plasma.
For one embodiment, the invention provides a method of forming a chalcogenide memory element having a first electrode, a second electrode, and a doped chalcogenide layer interposed between the first electrode and the second electrode. The method includes forming a chalcogenide layer on the first electrode, sputtering metal onto the chalcogenide layer and diffusing metal into the chalcogenide layer using a first plasma containing at least one component gas selected from the group consisting of neon and helium, thereby forming the doped chalcogenide layer, and sputtering metal onto the chalcogenide layer using a second plasma containing at least one component gas having an atomic weight higher than an atomic weight of neon, thereby forming the second electrode. For a further embodiment, the first plasma and the second plasma are the same plasma. For a still further embodiment, the composition of the first plasma is modified to generate the second plasma. Such modification of the composition may occur as a step change between sputtering stages or it may occur concurrently with sputtering of the metal.
For another embodiment, the invention provides a method of forming a chalcogenide memory element having a first electrode, a second electrode, and a doped chalcogenide layer interposed between the first electrode and the second electrode. The method includes forming a chalcogenide layer on the first electrode, sputtering silver onto the chalcogenide layer and diffusing silver into the chalcogenide layer using a first plasma generated from feed gas consisting essentially of neon, thereby forming the doped chalcogenide layer, and sputtering silver onto the doped chalcogenide layer using a second plasma generated from feed gas consisting essentially of argon, thereby forming the second electrode.
For yet another embodiment, the invention provides a method of forming a non-volatile memory device. The method includes forming word lines and forming first electrodes coupled to the word lines, wherein each word line is coupled to more than one first electrode. The method further includes forming a chalcogenide layer on each first electrode and sputtering metal onto each chalcogenide layer and diffusing metal into each chalcogenide layer using a first plasma containing at least one component gas selected from the group consisting of neon and helium, thereby forming doped chalcogenide layers. The method still further includes sputtering metal onto each doped chalcogenide layer using a second, different, plasma, thereby forming second electrodes. The second plasma may contain at least one component gas having an atomic weight higher than the atomic weight of neon. Alternatively or additionally, the second plasma may contain nitrogen (N2) such that the second electrode is formed of a metal-nitride material. The method still further includes forming bit lines coupled to the second electrodes, wherein each bit line is coupled to more than one second electrode. Each diode may be formed interposed between a second electrode and a bit line, such that each second electrode is coupled to a bit line through a diode. Alternatively, each diode may be formed interposed between a first electrode and a word line, such that each first electrode is coupled to a word line through a diode.
Further embodiments of the invention include methods of varying scope.